UCLA researchers proposed a new memory read and write circuitry that can solve all the three problems above. This new design uses negative differential resistance (NDR) devices in series with the memory cell write or read current path. The use of a pre-charge transistor and pre-charge pulse sequence is employed to maximize the usefulness of the NDR device. An NDR can also be shared and connected to the several bit-lines that share a sense amplifier.
UCLA researchers in the Department of Electrical Engineering have developed a new design of reading and writing circuitry using negative differential resistance devices to improve the performance of resistive memories.
- Decrease write energy, by writing current cut-off upon cell switching
- Improve sensing margin, thus reducing read difficulty, delay, energy, and errors
- Reduce read disturbance
- Reduce sensing circuit size (used transistor size), and simplify sensing circuit design (possible to eliminate the need for sense amplifiers)
- With minimal circuit overhead, one NDR device can be shared and connected to several bit-lines
- Can be applied to other resistance-changing memory technologies such as RRAM, PCM, MRAM
Improve the performance of resistive memories:
- Phase-change memory (PCM)
- Magnetic RAM (MRAM) including STT-MTJs, magnetoelectric RAM (MRAM)
- Resistive switching RAM (RRAM) including conductive bridging memory (CBM)
Name: UCLA Technology Development Group